Turn-off Time as a Precursor for Gate Bipolar Transistor Latch-up Faults in Electric Motor Drives

Douglas Brown, Manzar Abbas, Antonio Ginart, Irfan Ali, Patrick Kalgren, and George Vachtsevanos
Submission Type: 
Full Paper
Supporting Agencies (optional): 
National Defense Science and Engineering Graduate (NDSEG) Fellowship, Office of Naval Research
phmc_10_055.pdf611.25 KBOctober 4, 2010 - 6:41am

In this paper, effects preceding a latch-up fault in insulated gate bipolar transistors (IGBTs) are studied as they manifest within an electric motor drive system. Primary failure modes associated with IGBT latch-up faults are reviewed. Precursors to latch-up, primarily an increase in turn-off time and junction temperature, are examined for the IGBT. In addition, the relationship between junction temperature and turn-off time is explained by examining the semiconductor properties of an IGBT. To evaluate the effects preceding latch-up, seeded fault testing is conducted using aged transistors induced with a fault located in the die-attach solder layer. Since junction temperature cannot be directly measured, the transistor turn-off time is used as a measured system parameter to correlate between healthy and fault conditions. The experimental results provide statistically significant evidence (within 99% confidence) that an IGBT latch-up event, caused by elevated junction temperatures, can be detected by monitoring the transistor turn-off time in-situ.

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